著作
International Journal Papers
1. Hugo Cruz, Hong-Yi. Huang, Shuenn-Yuh Lee,, and Ching-Hsing Luo, “A 2.5 mW/ch, 50 Mcps,
10-analog Channel, Adaptively Biased Read-out Front-end IC with Low Intrinsic
Timing Resolution for Single-photon Time-of-flight PET Applications with Time-dependent
Noise Analysis in 90 nm CMOS,” y IEEE Trans. Biomedical Circuits and
Systems, pp. 287-299, Apr. 2017.
2. Yi-Hsiang Juan, Hong-Yi Huang, Shuenn-Yuh Lee, Shin-Chi Lai, Wen-Ho
Juang, Ching-Hsing Luo, “A Self-testing Platform with a Foreground Digital
Calibration Technique for SAR ADCs”, Applied Sciences, July 2016.
3. Yi-Hsiang Juan, Hong-Yi Huang,
Shin-Chi Lai, Wen-Ho Juang, Shuenn-Yuh Lee, and Ching-Hsing Luo, “A Distortion Cancellation
Technique with the Recursive DFT Method for Successive Approximation
Analog-to-Digital Converters,” IEEE Trans. Circuits and Systems, Part II, pp.
146-150, Feb. 2016.
4. Yo-Hao Tu, Jen-Chieh Liu, Kuo-Hsing
Cheng, Wei-Ren Wang, Hong-Yi Huang, and
Chang-Chien Hu, “A 0.6-V
1.6-GHz 8-phase all digital PLL using multi-phase based TDC,” IEICE
Electronics Express, vol. 13, no.2, pp. 1-12, Jan. 2016.
5. Hugo Cruz, Hong-Yi Huang,
Shuenn-Yuh Lee, Hsin-Chi Lai and Ching-Hsing Luo, “A 1.3 mW Low-IF,
Current-Reuse, and Current-Bleeding RF Front-End for the MICS Band with Sensitivity
of -97 dBm,” IEEE Trans. Circuits and Systems, Part I, vol. 62 pp. 1627-1636,
Jun. 2015.
6. Hui-Wen. Cheng, T.-C. Yu, Hong-Yi Huang, T.-H, Huang, J.-C,
Chiou and C.-H, Luo. (2014) "Design of Miniaturized Antenna and Power
Harvester Circuit on the Enucleated Porcine Eyes," IEEE Antennas and
Wireless Propagation Letters. Vol. 13: pp. 1156-1159, Jun. 2014.
7. Hui-Wen Chang, Hong-Yi Huang, Yi-Hsiang Juan, Wei-Song Wang and Ching-Hsing Luo, "Adaptive successive approximation ADC for biomedical acquisition
system." Microelectronics Journal 44(9): pp. 729-735, Sep. 2013
8. Chih-Yuan Chen, Chia-Lin Chang, Chih-Wei Chang, Shin-Chi Lai,
Tsung-Fu Chien, Hong-Yi Huang, Jin-Chern Chiou and Ching-Hsing Luo (2013
March) “A Low-Power Bio-Potential Acquisition System with Flexible PDMS Dry
Electrodes for Portable Ubiquitous Healthcare Applications”, Sensors 13(3):
3077-3091, 2013.
9. Gilbert Andrew Matig-a and Hong-Yi Huang, “Equalization and Pre-Emphasis
based LVDS Transceiver,” Analog Integrated Circuits and Signal Processing, pp. 109-123, Apr. 2013.
10.
Jen-Chieh Liu, Hong-Yi Huang,
and Kuo-Hsing Cheng, “An Ultra-low Voltage All Digital Phase-Locked Loop using
a Digital Supply Regulator,” ICL Technical
Journal, vol. 150, pp.28-36, Apr. 2013.
11.
Hong-Yi Huang, Shin-Dian Jan and Ruei-Iun Pu, “All Digital Pulsewidth Control Loop,” International Journal of
Electronics, pp. 337-354, Mar. 2013.
12.
Kuo-Hsing Cheng. Jen-Chieh Liu
and Hong-Yi Huang, “A Wide Supply Voltage Range and Low-Power
All-digital Clock Generator,” Analog Integrated Circuits and
Signal Processing, pp. 517-526, Mar. 2013.
13.
Hong-Yi Huang and Bo-Ruei Wang, “High-Gain, High-Bandwidth,
Rail-to-Rail, Constant-gm CMOS Operational Amplifier,” International Journal of Electronics,
pp. 2-20, Jan. 2013.
14.
Kuo-Hsing Cheng. Jen-Chieh Liu and
Hong-Yi Huang, “A 0.6-V 800-MHz All-Digital Phase-Locked Loop with a
Digital Supply Regulator,” IEEE Trans. on Circuits and Syst. II,
pp. 888.-892, Dec. 2012.
15.
Chiung-An Chen, Shih-Lun Chen, Hong-Yi
Huang and Ching-Hsing Luo, “An Efficient Micro Control Unit with a
Reconfigurable Filter Design for Wireless Body Sensor Networks (WBSNs),”Sensors,12, pp. 16211-16227,
Dec., 2012.
16.
Hong-Yi
Huang, Chun-Chieh Wu and Ching-Hsing
Luo, “An MICS band frequency synthesizer
using active inductor and auto-calibration scheme,” Microelectronics Journal, pp. 592–599, Aug. 2012.
17.
Hong-Yi Huang and Ruei-Iun Pu, “Current-Mode
Bidirectional Transceiver with Impedance Matching,” Microelectronics Journal, pp. 1208-1215, Nov. 2011.
18.
Hong-Yi Huang, Wei-Ming Chiu,
Chia-Ming Liang and Kua-Hua Lee, “Pulsewidth Control Loop with Dynamic Digitally Controlled
Fast-Locking Schemes,” accepted by IET Circuits, Devices and
Systems.
19.
Hong-Yi Huang, Yang Chou and Cheng-Yu Chen, “CMOS Differential Logic Circuits using Charge-Redistribution and
Reduced-Swing Schemes,” IEICE Trans. Electronics, E95.C,
pp. 275-283, Feb.
2012.
20.
Hong-Yi Huang, Chun-Chieh Wu, and Ching-Hsing
Luo,
“A Fractional-N PLL for MICS Band
Application,” Microelectronics, Journal,
pp. 592-599, Aug. 2012.
21.
Jen-Chieh Liu, Hong-Yi Huang,
and Kuo-Hsing Cheng, “A 0.3 volt all digital crystal-less clock generator,” ICL Technical Journal, vol. 143, no.2,
pp.126-133, Feb. 2012.
22.
Shih-Lun
Chen, Hong-Yi Huang, and Ching-Hsing
Luo,
“Time Multiplexed VLSI Architecture for Real-Time Barrel Distortion Correction
in Video-Endoscopic Images” IEEE Trans.
Circuits and Systems for Video Technology, pp. 1612-1621, Nov. 2011.
23.
Shih-Lun
Chen, Hong-Yi Huang, and Ching-Hsing
Luo,
“A Low-Cost High–Quality Adaptive Scalar for Real-Time Multimedia Applications”
IEEE Trans. Circuits and Systems for
Video Technology, pp. 1600-1611, Nov. 2011.
24.
Hong-Yi Huang and Ruei-Iun Pu“ Differential Bidirectional
Transceiver for On-chip Long Wires,” Microelectronics Journal,
vol. 42, no. 11, pp. 1208-1215, Nov. 2011.
25.
Wei-Song
Wang, Hong-Yi Huang, Shu-Chun Chen, Kuo-Chuan Ho, Chia-Yu Lin, Tse-Chuan
Chou, Chih-Hsien Hu, Wen-Fong Wang, Cheng-Feng Wu, Ching-Hsing Luo, “Real-Time Telemetry System for
Amperometric and Potentiometric”, Sensors,11, pp. 8593-8610,
Sep., 2011.
26.
Hong-Yi
Huang and Jen-Chieh Liu,“All-Digital PLL Using
Bulk-Controlled Varactor and Pulse-Based Digitally Controlled Oscillator,” Analog Integrated Circuits
and Signal Processing, vol. 68, no. 3, pp.245-255, Sep. 2011.
27.
Kuo-Hsing Cheng, Jen-Chieh Liu, Hong-Yi Huang, Yu-Liang Li,
and Yong-Jhen Jhu, “A 6 GHz Built-in Jitter Measurement Circuit Using
Multi-phase Sampler” IEEE Trans. on Circuits and Syst. II, vol.19, no.58,
pp.492-496, Aug. 2011.
28.
Chiung-An
Chen,Shih-Lun Chen, Hong-Yi Huang and
Ching-Hsing Luo, “Asynchronous Multi-Sensor Micro Control Unit for Wireless
Body Sensor Network (WBSN)”, Sensors,11, pp. 7022-7036, Jul.,2011.
29.
Wei-Song
Wang, Hong-Yi Huang, and Ching-Hsing
Luo,
“Wireless Biopotential Acquisition System for Portable Healthcare Monitoring” Journal of Medical Engineering &
Technology, pp. 254-261, May, 2011.
30. Chia-Lin Chang, Chih-Wei Chang, Hong-Yi Huang, Chen-Ming Hsu, Chia-Hsuan Huang, Jin-Chern
Chiou, and Ching-Hsing Luo,
“A Power-Efficient Bio-Potential Acquisition Device withDS-MDE Sensors for
Long-Term Healthcare Monitoring Applications”, Sensors 10(5), pp.4777-4793, May 2010.
31.
Wei-Song Wang, Wei-Ting Kuo, Hong-Yi
Huang and Ching-Hsing Luo, “Wide Dynamic Range CMOS Potentiostat for
Amperometric Chemical Sensor”, Sensors 10(3), pp.1782-1797, March 2010.
32.
Shih-Lun Chen, Ho-Yin Lee, Chiung-An Chen, Hong-Yi Huang, and Ching-Hsing Luo, ”Wireless Body Sensor
Network With Adaptive Low-Power Design for Biometrics and Healthcare
Applications,” IEEE
Systems Journal, vol. 3, no. 4, pp. 398 - 409, Dec.
2009.
33.
Hong-Yi Huang and Shu-Feng Lee, “Digitally Programmable Rail-to-Rail CMOS Operational
Amplifier as Reusable Silicon IP,” Tamkang
Journal of Science and Engineering, vol. 12, no. 4, pp. 409-415, 2009.
34.
Shih-Lun Chen, Ho-Yin Lee,
Chiung-An Chen, Hong-Yi Huang, and Ching-Hsing Luo, “An Architecture of
Wireless Biomedical Sensor Network for Monitoring Applications”, International
J. of Electrical Eng.,vol.16, no.5, pp.403-409, Sep. 2009.
35.
Hong-Yi Huang and Chia-Ming Liang, “Frequency Multiplier Using 50% Duty Cycle
Corrector” IEICE Electronics Express Brief,Vol. 5, No. 22 pp.990-994, Nov. 2008.
36.
Hong-Yi Huang and Shih-Lun Chen, “High-Speed Transition Detection Circuits for On-Chip
Interconnects,” Tamkang Journal of
Science and Engineering,vol.9,
no. 1, pp. 37-44, 2006.
37.
Hong-Yi Huang and Jinn-Fu Lin, “Design and Application of CMOS Bulk Input Scheme,” IEEE J. Solid-State Circuits, pp.
1305-1312, Aug. 2004.
38.
Wei-Ming Lin and Hong-Yi Huang, “A Low-Jitter Mutual-Correlated
Pulse Width Control Circuit,” IEEE J.
Solid-State Circuits, pp. 1366-1369, Aug. 2004.
39.
Hong-Yi Huang and Shih-Lun Chen, “Interconnect Accelerating Techniques for sub-100nm
Giga-Scale Systems,” IEEE Trans. VLSI
Systems, pp. 1192-1200, Nov. 2004.
40.
黃弘一，“IC設計常見之十大問題” ，電子月刊， pp. 126-133.
May, 2001,
41.
Kuo-Hsing Cheng, Wei-Bin Yang, and Hong-Yi Huang, “The Charge
Transfer Feedback-Controlled Split Path CMOS Buffer”, IEEE Trans. Circuits and Systems, pp. 346-348, Mar. 1999.
42.
黃弘一、鄭國興、吳重雨,“局部非同步邏輯電路的真單相時脈架構,”CCL Technical Journal ,
pp. 63-70 , May. 1995
43.
Hong-Yi Huang and Chung-Yu Wu, “New Design Methodology and New CMOS Differential Logic
Circuits for the Implementation of Ternary Logic Systems in CMOS VLSI without
Process Modification”, IEICE Trans.
Electronics, Vol. Vol.E77-C, No.6, p.960-969, Jun. 1994.
44.
Chung-Yu Wu and Hong-Yi Huang, “Design and Application of Pipelined
Dynamic CMOS Ternary Logic and Simple Ternary Differential Logic”, IEEE, J. Solid-State Circuits, pp.
895-906, Aug. 1993.
A. Patents
1.
Tzuen-Hsi Huang, Ying-Chun Lin, Wei-Shang Su, Huey-Wen Cheng, Hong-Yi
Huang, Ching-Hsing Luo and Jin-Chern Chiou, “Wireless Intraocular Pressure
Monitoring Device, and Detcting Module Thereof,” US patent 20140275936 A1.
2.
黃弘一, 許智淵, 曾暐盛, 鄭國興, 朱元華, “洋蔥波形產生器與使用洋蔥波形產生器的展頻時脈產生器,”中華民國專利發明, I403091, 2013年7月21日.
3.
黃弘一, 普瑞昀, 朱元華, “信號傳收裝置及系統,”中華民國專利發明, I393349,2013年4月11日.
4.
Wei-Shen Tsen, Hong-Yi Huang, Kuo-Hsin Chengand Yuan-Hua Chu, “Clock Generator and Delta-Sigma Modulator Thereof,” U.S. patent, US 8,369,476, Feb. 5, 2013.
5.
曾暐盛, 黃弘一, 鄭國興,朱元華, “時脈產生器及其多模數除頻器和差異積分調變器,”中華民國專利發明, I376877, 2012年11月11日.
6.
Hong-Yi Huang, Chih-Yuan Shu, Wei-Shen Tsen, Kuo-Hsin Chengand Yuan-Hua Chu, “Onion Waveform Generatorand Spread
Spectrum Clock Generator Usingthe Same,”8,269,536,
Sep. 18, 2012.
7.
Hong-Yi Huang, Rui-Yun Puand Yuan-Hua Chu, “Signal Transceiver
Apparatus and System,”U.S. patent US 8,154,318
B2, Apr. 10, 2012.
8.
Hong-Yi Huang, Jen-Chieh Liu
and Yuan-Hua Chu, “High-Resolution Varactors, Single-Edge Triggered Digitally Controlled
Oscillator and All Digital Phase Locked Loop Using the Same,” U.S. patent, US 8,125,286,
Feb. 28, 2012.
9.
Hong-Yi Huang, Ru-Jie Wang and Yuan-Hua Chu, “Voltage Generating Apparatus (II),”US2009146625 (A1), Nov. 06, 2009, US
8026709 B2, Sep. 27, 2011.
10. Hong-Yi Huang, Yi-Jui Tsaiand Yuan-Hua Chu, “Timeto Digital Converter Apparatus,”US8023363 B2, Sep.
20, 2011.
11. Wei-Shen Tsen, Hong-Yi Huang,
Kuo-Hsin Chengand Yuan-Hua Chu, “Clock Generator and
Multimodulus Frequency Divider and Delta-Sigma Modulator Thereof,”US7,924,965 (B2), Apr. 12, 2011.
12. 黃弘一,
蔡宜叡, 朱元華,“時間數位轉換裝置”中華民國專利, 200926609, 2009年6月16日, I357723, 2012年2月1日.
13. 黃弘一, 劉仁傑,朱元華, “數字控制振盪器和全數字鎖相環,”中國大陸發明, CN101183852A, ZL200710088558.X,
May 18, 2011.
14. 黃弘一,
王銣傑 朱元華,“電壓產生裝置(I)”中華民國專利發明, I351590, 2011年11月1日..
15. 黃弘一,
王銣傑,朱元華,“電壓產生裝置(II)”中華民國專利發明, I351591, 2011年11月1日..
16. 黃弘一,
黃立威,朱元華,“展頻時脈產生裝置”中華民國專利發明, I345881, 2011年7月21日.
17. 黃弘一,
洪均在 朱元華,“電流交換邏輯電路”中華民國專利發明, I348819, 2011年9月11日.
18. 黃弘一,
劉仁傑, 朱元華, “數位控制變容器、數位控制振盪器和全數位鎖相回路”中華民國專利發明, I348276, 2011年9月1日.
19. Hong-Yi Huang, Li-Wei Huangand Yuan-Hua Chu, “Spread
Spectrum Clock Generating Apparatus,” U.S. patentUS7791385 (B2), Sep. 07, 2010.
20. 黃弘一,
詹勳典, 朱元華, “全數位式脈波寬度控制裝置”中華民國專利發明,I331854, 2010年10月11日.
21. 黃弘一,
詹勳典, 朱元華, “全數位式延遲鎖相迴路”中華民國專利發明,I325694, 2010年6月1日.
22. 黃弘一, 巫昇達, 朱元華, “脈波寬度數位轉換器,”中華民國專利發明,I328932, 2010年8月11日.
23. 黃弘一, 普瑞昀, 朱元華, “雙向差動式傳輸接收器,”中華民國專利發明, I323573, 2010年4月11日.
24. Hong-Yi Huang, Chun-Tsai Hung and Yuan-ua
Chu, “Bulk Input Current Switch Logic Circuit (I),” US7605613 B2, Oct. 20,
2009.
25. Hong-Yi Huang, Chun-Tsai Hung and Yuan-ua
Chu, “Bulk Input Current Switch Logic Circuit (II),” US7605614 B2, Oct. 20,
2009.
26. Hong-Yi Huang. Ru-Jie Wang and
Yuan-Hua Chu, “Voltage Generating Apparatus (I),” US 7575599 B2, Aug. 18, 2009.
27. Hong-Yi Huang, Ruei-Iun Puand Yuan-Hua Chu, “Differential
Bidirectional Transceiver and Receiver Therein,”US2008116936 (A1),US 7551000 B2, Jun. 23, 2009.
28. Hong-Yi Huang, Sen-Da Wuand Yuan-Hua Chu, “Cycle
Time to Digital Converter,”US2008111720 (A1),US 7522084 B2, Apr. 21, 2009.
29. Hong-Yi Huang, Shun-Dian Janand Yuan-Hua Chu,
“Digital Delay Locked Loop,”US2008143402 (A1),US 7525355 B2, Apr. 28, 2009.
30. Hong-Yi Huang, Shun-Dian Janand Yuan-Hua Chu,
“Digital Pulse-Width Control Apparatus,” US 7528640 B2, May 5,2009.
31. 黃弘一,
詹勳典, 朱元華, “可程式延遲電路”中華民國專利發明, 200926493, 2009年6月16日.
32. 黃弘一, 吳慶傑, 朱元華, “雙向式電流傳輸裝置,”中華民國專利發明第 I306692, 2009年2月21日.
33. Hong-Yi Hunag, Wei-Ming Chiuand Yuan-Hua Chu,
“Pulse-Width Control Loop for Clock with Pulse-Width Ratio within Wide Range,”US2007146025 (A1),US 7466177 B2, Dec. 16, 2008.
34. Hong-Yi Huang, Shun-Dian Janand Yuan-Hua Chu,
“Programmable Delay Circuit,”US2008143413 (A1), US 7446585 B2, Nov. 4, 2008.
35. Hong-Yi Huang, Ching-Chieh Wu and Yuan-Hua
Chu, “Bidirectional Current-Mode Transceiver,”, US7342419 B2, Mar. 11, 2008.
36. 黃弘一, 邱韋銘, 朱元華, “大範圍之脈波寬度控制電路,”中華民國專利發明第 I304293, 2008年12月11日.
37. Hong-Yi Huang, Jian-Hong Shenand Yuan-Hua
Chu, “DLL-Based Programmable Clock Generator Using a Threshold Trigger Delay
Element and Circular Edge Combiner,” U.S. patentUS7292079 B2, Nov. 6, 2007.
38. 黃弘一, 何昇峰, 朱元華, “時脈產生器及其低通濾波器,”中華民國專利發明第I280725, 2007年5月1日.
39. Hong-Yi Huang, Sheng-Feng Ho and Shuan-Yi Su,
“Dual-Modulus Prescaler Using Double-Edge-Trigger Flip-Flop,” US2005/0253630
A1,Nov. 17, 2005.
40. Hong-Yi Huang, “Receiver and Transmission in
a Transmission System,” US 6999518 B1, Feb. 14, 2006.
41. 黃弘一, 陳世倫, “電容耦合加速裝置,”中華民國專利發明I256771, 2006年6月11日.
42. Hong-Yi Huang and Wei-Ming Lin “Pulsewidth control loop device with
complementary signals,”U.S.7,009,436 B2, Mar. 6, 2006.
43. Hong-Yi Huang and Jinn-Fu Lin “Bulk Input
Differential Logic Circuits,” U.S. patent 0214327 A1, Nov. 20, 2003; US
6,838,909, B2, Jan. 4, 2005.
44. Hong-Yi Huang and Shih-Lun Chen “Apparatus of
Capacitor-Coupling Accelerating,”US 6,850,089 B2, Feb. 1, 2005.
45. Hong-Yi Huang, “Receiver and Transmitter in a
Transmission System,” Japan patent 3492636, Nov. 14, 2003.
46. Hong-Yi Huang, “Transmitter for
transmitting signals over transmission lines for use in memory circuit,” U.K. patent GB 2368434, Jan.
22, 2003.
47. 黃弘一、林京甫,”基極輸入差動邏輯電路,”中華民國專利發明I176326, 2003年8月14日.
48. Hong-Yi Huang, “Signal receiver
and transmission system including said receiver,” U.K. patent GB 2,362,247 B, Dec. 18,
2002.
49. Hong-Yi Huang, “Capacitor Coupling Differential
Logic Circuit,” U.S. patent no. 6.456,120 B1, Sep. 24, 2002.
50. 黃弘一,“隱藏式2P2N偽靜態隨機存取記憶體及再更新方法”, 中華民國專利發明I166833, 2002年11月11日.
51. 黃弘一, “傳輸信號用之接收器與傳送器“中華民國專利發明, I162862, 2002年8月21日.
52. Hong-Yi Huang, “Charge-Redistribution
Low-Swing Differential Logic Circuit,” U.S. patent6,331,791 B1, Dec. 18, 2001.
53. Hong-Yi Huang, “Hidden Refresh Pseudo SRAM
and Hidden Refresh Method,” U.S. patent6,285,578 B1, Sep. 4, 2001.
54. 黃弘一, “電荷再分佈振幅差動邏輯電路”, 中華民國專利發明I128998, 2001年2月21日.
55. 黃弘一、林建宏, “自主列辨識隱藏式更新電路及更新方法,” 中華民國專利發明I131464, 2001年4月21日.
56. 黃弘一, “電容耦合差動邏輯電路,”中華民國專利發明I139532, 2001年7月11日.
57. Hong-Yi Huang and Jien-Horng Lin, “Self
Row-Identified Hidden Refresh Circuit and Refresh Method Thereof”, Japan
patent, pending, U.S. patent no 06154409, Nov. 29, 2000.
58. Hong-Yi Huang, “Single Transition Per
Evaluation Phase Latch Circuit for Pipelined True-Single-Phase Synchronous
Logic Circuits,” U.S. patent no. 5,815,006, Sep. 29, 1998.
59. Hong-Yi Huang, “Locally Asynchronous,
Pipelineable Logic Circuits for True-Single-Phase Logic Circuits,” U.S. patent
no. 5,841,298, Nov. 14, 1998.
B. International Conference Papers
2. Hong-Yi Huang, Chun-Lian Chen, Jin-Sheng Chen,
Chun Yi and Kuo-Hsing Cheng, "140 mV-Startup Boost Converter for Thermal
Energy Harvesting System" First International Conference on
Microelectronic Devices and Technologies (MicDAT '2018),
2018.
3. Hugo Cruz, Hong-Yi
Huang, Ching-Hsing Luo, Lih-Yih Chiou, and Shuenn-Yuh Lee, “A Novel Clock-Pulse-Width
Calibration Technique for Charge Redistribution DACs”, IEEE International
Symposium on Circuits and Systems, 2017.
4. Hong-Yi Huang
et al., “Wireless Intraocular
Pressure Sensing System --- Reader Chip,” Progress in Electromagnetics Research Symposium,2017.
5. Hong-Yi Huang
et al., “Wireless Intraocular Pressure
Sensing System --- Sensor Chip,” Progress in Electromagnetics Research Symposium,2017.
6. Hao-Chiao Hong, Hung-Yi Wen and Hong-Yi
Huang, “Design of A Fast Lock-in and Low-Power All-Digital Frequency
Synthesizer With A Wide Tuning Range,” Workshop on Synthesis And System
Integration of Mixed Information Technologies, 2016.
7. Yi-Hsiang Juan, Hong-Yi Huang, Shuenn-Yuh Le1, Shin-Chi Lai, Wen-Ho
Juang, and Ching-Hsing Luo, “A Digitally Self-Calibration Method with Recursive
DFT Algorithm for 12-bit SAR ADC Realization”, ICASI (International Conference
of Applied System Innovation), Okinawa, Japan, 2016.
8. Yo-Hao Tu, Kuo-Hsing
Cheng, Wei-Ren Wang, Jen-Chieh Liu, Hong-Yi
Huang, ”A Chaotically Injected Timing Technique for Ring-Based Oscillators,” IEEE
International Symposium on Design and Diagnostics of Electronic Circuits and
Systems, 2016.
9. Hong-Yi Huang, Kun-Yuan Chen, Jia-Hao Xie, Ming-Ta Lee, Hao-Chiao Hong,
Kuo-Hsing Cheng, “Gm-C Filter with
Automatic Calibration Scheme,” IEEE International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, 2016.
10. Hong-Yi
Huang, Shao-Zu Yen,
Jhen-Hong Chen, Hao-Chiao Hong, Kuo-Hsing Cheng,”
Low-Voltage Indoor Energy Harvesting Using Photovoltaic Cell,” IEEE
International Symposium on Design and Diagnostics of Electronic Circuits and
Systems, 2016.
11. Hugo Cruz, Hong-Yi Huang, Shueen-Yu Lee and Ching-Hsing Luo, “A 2.5 mW/ch, 50 Mcps, 10-Analog Channel,
Adaptively Biased Read-out front-end IC with 9.71 ps-RMS timing resolution
for single-photon time-of- flight PET applications in 90 nm CMOS,”
Presentation at the 2015 ISSCC Student Research Preview.
12. Hugo Cruz, Hong-Yi
Huang, Shueen-Yu Lee and Ching-Hsing Luo,” A 2.5 mW/ch, 50 Mcps, 10-analog channel,
adaptively biased read-out front-end IC with 9.71 ps-RMS timing resolution for
single-photon time-of-flight PET applications in 90 nm CMOS,” IEEE VLSI-DAT,
2015, pp.1-4.
13. Yo-Hao Tu, Kuo-Hsing
Cheng, Yian-An Lin, Hong-Yi Huang, ”A Synchronous Mirror Delay with
Duty-cycle Tunable Technology,” IEEE International Symposium on
Design and Diagnostics of Electronic Circuits and Systems, 2015, pp. 79-82.
14. Hong-Yi Huang, Gene Fe Palencia, Da-Kai
Chen, Wei-Hsuan Huang, Kuo-Hsing Cheng,” Triangular Modulation Using
Switched-Capacitor Scheme for Spread-Spectrum Clocking,” IEEE International Symposium on Design and
Diagnostics of Electronic Circuits and Systems, 2015, pp.87-90.
15. Hong-Yi Huang, Jen-Chieh Liu, Pei-Ying
Lee, Kun-Yuan Chen, Jin-Sheng Chen, Kuo-Hsing Cheng, Tzuen-Hsi Huang, Ching-Hsing
Luo, Jin-Chern Chiou, ”PVT Insensitive High-Resolution Time to Digital
Converter for Intraocular Pressure Sensing,” IEEE International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, 2015,
pp125-128.
16. Hugo Cruz, Hong-Yi Huang, Shueen-Yu Lee and Ching-Hsing Luo, "Analysis and Design of a 1.3-mW Current-Reuse RF Front-End for
MICs Band," IEEE International
Symposium on Circuits and Systems, 2014, pp. 1360-1363.
17. Jen-Chieh Liu, Huan-Ke Chiu, Jia-Hung Peng, Yuan-Hua Chu and Hong-Yi
Huang, “A Radio-Controlled Receiver for Clocks/Watches and Alarm
Applications,” IEEE International Symposium on Circuits and Systems, 2014, pp.
2672-2675.
18. Hugo Cruz, Ting-Chia Yeh, Hong-Yi Huang, Shueen-Yu Lee and Ching-Hsing
Luo, “DAC for Positron
Emission Tomography Front-End,“ IEEE International Symposium on Bioelectronics and Bioinformatics,
2014, pp.1-4.
19. Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia
Sun, Cheng-Hao Fu, Kuo-Hsing Cheng, “A 64-MHz~640-MHz 64-Phase Clock
Generator,” IEEE International
Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2014, pp. 51-54.
20. Yo-Hao Tu, Kuo-Hsing Cheng, Chih-Hsun Hsu, and Hong-Yi Huang,
“A Low Supply Voltage Synchronous Mirror Delay with Quadrature,” IEEE International Symposium on Design
and Diagnostics of Electronic Circuits and Systems, 2014, pp. 163-166.
21. Hong-Yi Huang,
Ding-Yu Wei, Wen-Jie Yang, Wei-Jhe Ma, and Ching-Hsing Luo, “Near-Field Wireless Power Integrated Circuit
without External Capacitors,” IEEE International Symposium on
Next-Generation Electronics, Y1-5, 2014.
22. Allenn Lowaton and Hong-Yi
Huang, “Overstress-Free Charge Pump White LED Driver,” International
Conference on Circuits and Systems, 2014.
23. H.-W. Cheng, B.-M.
Jeng, C.-Y. Chen, H.-Y. Huang, J.-C. Chiou and C.-H. Luo (2013).
"The Rectenna Design on Contact Lens for Wireless Powering of the Active
Intraocular Pressure Monitoring System, " IEEE Int. Conf. EMBS, Osaka,
pp.3-7, 2013.
24. Hong-Yi Huang, Cheng-Yu Chen and Kuo-Hsing Cheng, “External
Capacitorless Low Dropout Linear Regulator using Cascode Structure,” IEEE International Symposium
on Design and Diagnostics of Electronic Circuits and Systems,pp. 236-239, 2013.
25. Hong-Yi Huang, Chinet Otic Mocorro, Julyver Pinaso, and
Kuo-Hsing Cheng, “Indoor Energy Harvesting Using Photovoltaic Cell for Battery,
”IEEE
International Symposium on Design and Diagnostics of Electronic Circuits and
Systems,pp. 224-227, 2013.
26. Yo-Hao Tu, Kuo-Hsing Cheng, Hsiang-Yun Wei and Hong-Yi
Huang, “A Low Jitter Delay-Locked-Loop Applied for DDR4,”IEEE International Symposium
on Design and Diagnostics of Electronic Circuits and Systems,pp. 98-101, 2013.
27. Yu-Shun Tang,
Wei-De Jeng,
Ting-Wei Huang, Mang Ou-Yang,
Jin-Chern Chiou,
Jeng-Ren Duann,
Ching-Hsing Luo,
Hong-YiHuangandYi-Wu Tsai,
“The novel research of intraocular
pressure tonometer by using inductance sensor,” IEEE Sensor, pp. 1-4, 2012.
28. Wei-Jer Ma, Ching-Hsin Luo and Hong-Yi Huang, "A Low Power
Analog Front-End (AFE) Circuit Dedicated for Driving Bio-Electrochemical
Sensors and Peripheral Devices,” IEEE International Symposium on Bio-Circuits
and Systems, pp. 120-123, 2012.
29. Jen-Chieh Liu, Wei Chun Lee, Hong-Yi Huang,
Kuo-Hsing Cheng, Chao-Jen Huang, Yu-Wei Liang, Jia-Hung Peng, and Yuan-Hua Chu,
“A 0.3-V All Digital Crystal-less Clock Generator for Energy Harvester
Applications,” IEEE Asian Solid-State Circuits Conference, pp. 117-120, 2012.
30. Yu-Shun Tang,
Wei-De Jeng, Ting-Wei Huang, Mang Ou-Yang, Jin-Chern Chiou, Jeng-Ren Duann,
Ching-Hsing Luo, Hong-Yi Huang, and Yi-Wu Tsai, “The Novel research of Intraocular Pressure Tonometer by Using
Inductance sensor,” IEEE Sensor Conference, pp. 117-120, 2012.
31. Yi-Hsiang Juan, Hong-Yi
Huang and Ching-Hsing Luo, “A
Low Voltage Sigma Delta Modulator for Temperature Sensor”IEEE International Symposium
on Design and Diagnostics of Electronic Circuits and Systems,pp. 270-273, 2012.
32. Hong-Yi Huang, Patrick Adrian Conge and Li-Wei Huang, “CMOS Image Sensor Binning Circuit
for Low Light Imaging”International Symposium on Industrial Electronics and
Applications, pp. 586-589, 2011.
33. Hong-Yi Huang, Wei-Chung Hung, Hui-Wen Cheng and Ching-Hsing Luo, “All Digital Time-to-Digital
Converter with High Resolution and Wide Detection Range”International
Conference on Electrical and Electronics Engineering, 2011.
34. Tzu-Chi Huang, Hong-Yi
Huang, Jen-Chieh Liu, Kuo-Hsing Cheng and Ching-Hsing Luo,“All Digital Phase-Locked Loop Using Active Inductor Oscillator and Novel Locking Algorithm”IEEE
International Symposium on Circuits and Systems, pp. 486-489, 2011.
35. Chia-Lin Chang,Fu-Jhuan Huang,Chien-Ming Lee,Wei-Che Ma,Ching-Hsing LuoandHong-YiHuang, “Novel triple-band biotelemetry system with miniaturized antenna for
implantable sensing applications,”, IEEE Sensor, pp. 104-107, 2010.
36. J.-R. Duann, C.-W. Chang, C.-L. Chang, Y.-J. Lin, S.-C. Liang, H.-Y.
Huang, C.-H. Luo, J.-C. Chiou, “Animal EEG/ECoG Acquisition System without Wire
Bound,” Neuroscience Conference, San Diego, USA, Sessions 818.5, Nov. 13-17,
2010.
37. C.-L. Chang, F.-J. Huang, C.-M. Lee, W.i-C. Ma,H.-Y. Huang,
C.-H. Luo, “Novel Triple-Band Biotelemetry System with Miniaturized Antenna for
Implantable Sensing Applications,” Sensors Conference, Hawaii, USA, Special
Session II, Nov. 1-4, 2010.
38. Kuo-Hsin Cheng, Chang-Chien Hu, Jen-Chieh Liu and Hong-Yi Huang, “A time-to-digital converter
using multi-phase-sampling and time amplifier for all digital phase-locked loop,”
IEEE Symposium onDesign and Diagnostics of
Electronic Circuits and Systems, pp. 285-286,2010.
39. Hong-Yi Huang, Wei-Ming
Chiu,Chia-Ming Liang and Kun-Hua Lee; “Wide-Range
High-Precision Pulsewidth Control Loop Circuit”, IEEE Conference on Industrial Electronics and
Applications, 123 – 126, 2009.
40. Wei-Song Wang, Zhao-Cheng Wu, Hong-Yi Huang and Ching-Hsing
Luo, “Low-Power Instrumental Amplifier for Portable ECG”,IEEE Circuits and
Systems, International Conference on Testing and Diagnosis, pp. 1-4, 2009.
41. Hong-Yi
Huang and Fu-Chien
Tsai, “Analysis and Optimization of
Ring Oscillator Using Sub-Feedback Scheme”, IEEE
Symposium on Design and Diagnosis of Electronic
Circuits and Systems, pp. 28-29, 2009.
42. Jen-Chieh Liu, Hong-Yi Huang, Wei-Bin Yang, Kuo-Hsing Cheng, “0.5V 160-MHz 260uW All Digital
Phase-Locked Loop, IEEE Symposium on Design and Diagnostics of
Electronic Circuits and Systems ,pp.
186-193, 2009.
43. Wei-Chen Huang,
Chen-Ming Hsu, Chien-Ming Lee, Hong-Yi Huang and Ching-Hsing Luo, “Dual Band LNA/Mixer Using Conjugate Matching for Implantable
Biotelemetry”IEEE
International Symposium on Circuits and Systems, pp. 1764-1767, 2008.
44. Hong-Yi Huang,
Yi-Jui Tsai, Kung-Liang Ho and Chan-Yu Lin, “All Digital Time-To-Digital Converter Using Single Delay-Locked Loop”, IEEE
International SOC Conference, pp. 341-344, 2008.
45. Hong-Yi Huang, Li-Wei Huang, Wei-Sheng Tseng and Chih-Yuan Hsu;
“A 6-Gbit/s SATA Spread-Spectrum
Clock Generator Using Two-Stage Delta-sigma Modulator”, IEEE International SOC Conference, pp. 333-336, 2008.
46. Hong-Yi Huang and Ru-Jie Wang and Shih-Chiang
Hsu,“Piecewise
Linear Curvature-Compensated CMOS Bandgap Reference”IEEE International Symposium on Electronics, Circuits
and Systems, pp. 308-311, 2008.
47. Hong-Yi Huang,
Chun-Tsai Hung and Sheng-Chia Chiang, “CMOS
Bulk Input Current Switch Logic Circuit,”IEEE International Symposium on Electronics, Circuits and Systems, pp.
498-501, 2008.
48. Hong-Yi Huang,
Ruei-Iun Pu and Ming-Da Li, “Simultaneous Bidirectional Transceiver with Impedance Matching,”IEEE International Symposium on Electronics, Circuits
and Systems, pp.312 - 315, 2008.
49. Hong-Yi Huang,
Chia-Ming Liang and
Shi-Jia Sun, “Low-Power 50% Duty Cycle Corrector,”IEEE International Symposium on Circuits and Systems, pp.
2362–2365, 2008.
50. Chiung-An Chen, Ho-Yin Lee, Shih-Lun Chen, Hong-Yi Huang and Ching-Hsing Luo,“Low-Power
2.4-GHz Transceiver in Wireless Sensor Network for Bio-medical Applications”
IEEE International Symposium on Bio-electronic Circuits and Systems, , pp.239-242,2007.
51. Ho-Yin Lee, Shih-Lun Chen,
Chiung-An Chen,Hong-Yi Huang and Ching-Hsing Luo,‘Wireless Thermal Sensor Network with Adaptive
Low Power Design, ”IEEE International Conference of Engineering in
Medicine and Biology Society, pp. 5890–5893, 2007.E
52. Hong-Yi Huang, Jen-Chieh Liu and Kuo-Hsin Cheng, “All-Digital PLL Using Pulse-Based DCO,”IEEE
International Conference on Electronics, Circuits and
Systems,pp.1268-1271 ,2007.
53. Shih-Lun Chen, Ho-Yin
Lee, Chiung-An Lee, Hong-Yi Huang and Ching-Shin Luo, “Wireless Sensor Network by Separating Control
and Data Path (SCDP) for Bio-medical Applications, ”European Microwave Conference, pp. 430-433,2007.
54. Hong-Yi Huang and Ru-Jie Wang, “A Curvature Compensated CMOS Bandgap Reference with Lower Output Voltage,
”IASTED International Circuits, Signals and Systems Conference,2007.
55.
Hong-Yi Huang and Yi-Ruei
Tsai and Sen-Da Wu, “A New Cycle-Time-to-Digital
Converter with Two-Level Conversion Scheme, ”IEEE International Symposium on Circuits and Systems, pp. 2160-2163,2007.
56.
Hong-Yi Huang and Ruei-Iun Pu, “Differential Bidirectional
Transceiver for On-chip Long Wires, ”International
Technical Conference on Circuits/Systems, Computers and Communications, 2006.
57. Hong-Yi Huang and Shin-Dian Jan, “All Digital Pulsewidth Control
Loop with Real Time Output, ”International Technical
Conference on Circuits/Systems, Computers and Communications, 2006.
58. Hong-Yi Huang, Chia-Ming Liang and
Wei-Ming Chiu,“1~99% Input Duty 50%
Output Duty Cycle Corrector, ”IEEE International Symposium on Circuits
and Systems, pp. 4175-4178, 2006.
59. Hong-Yi Huang and Bo-Ruei Wang, “High-Gain and High-Bandwidth Rail-to-Rail Operational Amplifier with
Slew Rate Boost Circuit, ”IEEE
International Symposium on Circuits and Systems,2006.
60. Hong-Yi Huang and Ching-Chieh Wu, “On-Chip Bidirectional
Transceiver, ”IEEE International Symposium on Circuits
and Systems,2006.
61. Hong-Yi Huang, Sheng-Fen Ho and Li-Wei Huang, “A 64-MHz~1920-MHz Programmable
Spread-Spectrum Clock Generator,” IEEE
International Symposium on Circuits and Systems, pp. 3363-3366, 2005.
62.
Sheng-Fen Ho and Hong-Yi Huang, “A Wideband Programmable
Spread-Spectrum Clock Generator, ”IEEE Asian Solid-State
Circuits Conference, pp. 521-524, 2005.
63. Hong-Yi Huang, Chun-Ting Chen, “A High Bandwidth and Wide Dynamic Range Optical
Receiver, ”IEEE International Conference on Solid-State
and Integrated Circuits Technology, pp. 1268-1271, 2004.
64. Hong-Yi Huang, Wei-Ming Chio and Wei-Ming Lin, “Pulsewidth Control Loop Circuit Using
Combined Charge Pumps and Miller Scheme, ”IEEE International
Conference on Solid-State and Integrated Circuits Technology, pp. 1539-1542, 2004.
65. Hong-Yi Huang and Jian-Hong Shen, “A DLL-Based Clock Generator Using Threshold-Trigger
Delay Element and Circular Edge Combiner, ”IEEE
Asia-Pacific Conference on Advanced Systems Integrated Circuits, pp. 76-79, 2004.
66. Hong-Yi Huang, Ching-Chieh Wu and Shih-Lun Chen, “simultaneous Current-Mode Bidirectional Signaling
for On-Chip Interconnection, ”IEEE Asia-Pacific Conference
on Circuits and Systems, pp. 380-383, 2004.
67. Chun-Jen Huang and Hong-Yi
Huang, “A Low-Voltage CMOS Rail-to-Rail Operational Amplifier Using Double
P-Channel Differential Input Pairs, ’IEEE International
Symposium on Circuits and Systems, pp. I.636-I.637, 2004.
68. Hong-Yi Huang and Shu-Feng Lee, “A Wideband
CMOS Transconductance-Transimpedance Wideband Amplifier,” IEEE Midwest
Symposium on Circuits and Systems, 2003.
69. Hong-Yi Huang, Shen-Feng Ho and Hsuan-Yi Su, “A Dual Modulus Prescaler Using
Double-Edge-Trigger D-Flip-Flop, ”IEEE Midwest
Symposium on Circuits and Systems, pp. 209-212, 2003.
70. Cheng Jia, Linda Milor,
Sheng-Feng Ho and Hong-Yi Huang, “High Speed Phase Detector,” IEEE Midwest Symposium on Circuits and Systems, 2003.
71. Cheng Jia, Linda Milor,
Sheng-Feng Ho and Hong-Yi Huang, “Linear and Nonlinear Analysis of Ring
Oscillator Jitter in Phase Lock Loops, ”IEEE Midwest
Symposium on Circuits and Systems, 2003.
72. Wei-Min Lin and Hong-Yi Huang,
“A Low-Jitter Mutual-Correlated Pulse Width Control Circuit,” IEEE
International SOC Conference, pp. 301-304, 2003.
73. Hong-Yi Huang and Tzu-Sung Yen, “A Low-Voltage Embedded 4N SRAM with Smart Hidden
Refresh,” IEEE International SOC Conference, pp. 251-252, 2003.
74. Hong-Yi Huang and Yang Chou, “Low Power Circuits Using Charge- Redistribution and
Reduced-Swing Schemes,” IEEE International SOC Conference, pp. 147-150, 2003.
75. Shu-Feng Lee and Hong-Yi Huang, “A Rail-to-Rail CMOS
Operational Amplifier with Programmable Compensation Schemes, ”IEEE Conference
on Electron Devices and Solid-State Circuits, pp. 105-108, 2003.
76. Chin-Shan Shieh, Hong-Yi
Huang, Jeng-Dang Jua and
Ruey-Nan Yeh, “A High-Bandwidth Wireless
Infrared Receiver with Feedforward Offset Extraction”, IEEE International
Symposium on Circuits and Systems, pp. I.73-I.76, 2003.
77. Cheng Jia, Linda Milor, and Hong-Yi
Huang, “Capacitor Coupling Threshold Logic,“ IEEE Midwest Symposium on
Circuits and Systems, pp.483-486, 2002.
78. Cheng Jia, Linda Milor, and Hong-Yi
Huang, “High Speed CMOS Capacitor Coupling Threshold Logic,“ XVII
Conferences on Design of Circuits and Integrated Systems, Spain, pp. 413-418,
2002.
79. Hong-Yi Huang and Jinn-Fu-Lin, “Multiple Bulk
Input Differential Logic,” IEEE Asia-Pacific Conference on Circuits and
Systems, pp. 461-464, 2002.
80. Hong-Yi Huang and Shih-Lun Chen, “Threshold
Triggers and Accelerator for Deep Submicron Process,” IEEE Asia-Pacific
Conference on Circuits and Systems, pp. 143-146, 2002.
81. Hong-Yi Huang and Shih-Lun Chen, “Input-Isolated
Gain-Enhanced Sense Amplifier,” IEEE Asia-Pacific Conference on ASIC, pp.
57-60, 2002.
82. Fu-Kai Tsai and Hong-Yi Huang,
“A Detectable Time-Delay-Integration CMOS Readout
Circuit for IR Scanning,” IEEE International Conference on Electronics, Circuits and Systems, pp.
347-350, 2002.
83. Hong-Yi Huang and Shih-Lun Chen, “High-Speed
Receivers for on-Chip Interconnection in Deep-Submicron Process,” IEEE
International Conference on Electronics, Circuits and Systems, pp. 769-772,
2002.
84. Hong-Yi Huang and Jinn-Fu Lin, “CMOS Bulk
Input Technique”, IEEE International Symposium on Circuits and Systems, pp.
253-256, 2002.
85. Hong-Yi Huang and Xuan-Yi Su, “2P2N Pseudo
SRAM with Column Hidden Refresh in Standard CMOS Process,” IEEE International
Symposium on Circuits and Systems, pp.591-594, 2002.
86. Hong-Yi Huang and Shih-Lun Chen,
“Input-Isolated Sense Amplifiers,” IEEE International Symposium on Circuits and
Systems, pp.587-590, 2002.
87. Hong-Yi Huang and Teng-Neng Wang, “High-Speed
CMOS Logic Circuits in CMOS Capacitor Coupling Technique,” IEEE International
Symposium on Circuits and Systems, pp. 634-637, 2001.
88. Hong-Yi Huang and Teng-Neng Wang, “CMOS
Capacitor Coupling Logic (C3L) Circuits,” IEEE Asia-Pacific Conference on ASIC
Design, pp. 33-36, 2000.
89. Kuo-Hsing Cheng, W.B. Yang, and Hong-Yi
Huang, “The Charge Transfer Feedback-Controlled Split Path CMOS Buffer”, IEEE International Conference on
Electronics, Circuits, and Systems, 1997.
90. Hong-Yi Huang and Yuan-Hua Chu, “Unbalanced
Current Sense Amplifier for Low-Power High-Speed PLD’s”, IEEE International Symposium on Circuits and Systems, pp. 193-196,
1996.
91. Hong-Yi Huang and Yuan-Hua Chu,
“True-Single-Phase All-N-Logic Differential (TADL) for Very High-Speed Complex
VLSI”, IEEE Symposium on Circuits and
Systems, pp. 296-299, 1996.
92. Hong-Yi Huang and Yuan-Hua Chu,
“Feedback-Controlled Split-Path CMOS Buffer “, IEEE International Symposium on Circuits and Systems, “pp. 230-233,
1996.
93. Hong-Yi Huang, Kuo-Hsing Chen, Jinn-Shyan Wang,
and Chung-Yu Wu, “Low-Voltage Low-Power True-Single-Phase Pipelined Systems
with Locally Asynchronous Differential Logic Circuits”, IEEE International Symposium on Circuits and Systems, pp.1572-1575,
1995.
94. Hong-Yi Huang and Chung-Yu Wu, “New CMOS
Differential Logic Circuits for True-Single-Phase Pipelined Systems,” IEEE International Symposium on Circuits and
Systems, vol.4, pp.15-18, 1994.
95. Hong-Yi Huang and Chung-Yu Wu, “Self-Timed
DCVS(SDL) for True-Single-Phase CMOS Pipelined Systems”, International Symposium on IC Technology, Systems, and Applications,
pp. 219-223, 1993.
96. Hong-Yi Huang and Chung-Yu Wu, “Redundant
Algebra and Integrated Circuit Implementation of Ternary Logic and their
Applications”, IEEE International
Symposium on Circuits and Systems, pp. 1905-1908, 1993.
97. Hong-Yi Huang and Chung-Yu Wu, “CMOS
Clamped-Swing Logic and CMOS Differential Clapmed-Swing Logic”, IEEE Midwest Symposium on Circuits and
Systems, pp. 1073-1076, 1992.
98. Chung-Yu Wu and Hong-Yi Huang,
“A New Two-Phase Pipelined Dynamic CMOS Ternary Logic”, IEEE International Symposium on Circuits and Systems, pp. 582-586,
1990.
C. Local Conference Papers
1.
Hong-Yi Huang,Cheng-Yu Chen and Ting-Chia Yeh, “External
Capacitorless Low Dropout Linear Regulator
using Cascode Structure,” VLSI Design/CAD Symposium, 2012.
2.
Hong-Yi Huang, Fu-Chien Tsai, Jen-chieh Liu, Kun-Hua Lee, Kun-Yuan Chen and Ping-Che
Hsieh, “Design and Optimization of Arbitrary Stage Ring
Oscillator Using the Interpolating Scheme,” VLSI Design/CAD Symposium, 2012.
3.
Hong-Yi
Huang, Yuang-Kai Cheng and Yan-Fu
Huang, “A
Class D Amplifier Using Current Controlled PWM,”VLSI Design/CAD Symposium, 2012.
4.
Hong-Yi Huang, Ding-Yu Wei, Wei-Jhe Ma, Shao-Zu Yen and Ching-Hsing Luo,“Near-Field
Wireless Power Integrated Circuit Without External Capacitors,” VLSI
Design/CAD Symposium, 2012.
5. Chung-Shing Hu,
Wei-Song Wang, Shu-Chun Chen, Hong-Yi Huang, Kuo-Chuan Ho, Chia-Yu Lin,
Tse-Chuan Chou, Chih-Hsien Hu, and Ching-Hsing Luo, “Telemetric Point-of-Care
System for Portable UTI Detection,” in Symposium on Engineering, Medicine and Biology
Applications, Paper No. 2125, Kaohsiung, July 2011.
6. Hong-Yi Huang, Ming-Da Lee and
Kun-Yuan Chen, “Simultaneously
Bidirectional Transceiver for High-Speed Inter-Chip Data Communications,” VLSI Design/CAD Symposium, 2011.
7. Hong-Yi Huang, Pei-Yin Lee, Chun-Chieh
Wu,and Ching-Hsing Luo, “A
Fractional-N PLL for MICS Band
Application”,VLSI
Design/CAD Symposium, 2011.
8. Wei-Song Wang, Hong-Yi Huang, Kuo-Chuan
Ho, Chia-Yu Lin, Ching-Hsing Luo, “DDA-Based High-Linearity
Potentiostatfor Amperometric Electrochemical Sensors,” Symposium on
Engineering, Medicine and Biology Applications, 2011.
9. Hong-Yi Huang, Chia-Ming Liang and Patrick
Adrian S. Conge, “0.18um 100MHz~2.5GHz Duty Cycle Corrector,”VLSI Design/CAD Symposium,S10-3-1-4, 2008.
10. Hong-Yi Huang, Ruei-Iun Pu and Siddarth Rai
Mahendra, “Inter-Chip and Intra-Chip Bidirectional Transceiver
with Impedance Matching,”VLSI Design/CAD Symposium,S10-3-1-4, 2008.
11. Hong-Yi Huang and Ru-Jie Wang, “CMOS Bandgap Reference with Curvature Compensation on Higher Order
Temperature Terms,” VLSI Design/CAD Symposium,2007.
12. Hong-Yi Huang and Jen-Chieh Liu, “All-Digital
PLL Using Bulk-Controlled Varactor and Pulse-Based DCO,”VLSI Design/CAD Symposium,2007.
13. Hong-Yi Huang, Chia-Ming Liang and
Wei-Ming Chiu, “High-Stability Wide-Bandwidth 50% Duty Cycle Corrector,” VLSI Design/CAD Symposium,2006.
14. Hong-Yi Huang, Bo-Ruei Wang and Jen-Chieh
Liu, “High-Gain and High-Bandwidth Rail-to-Rail CMOS Operational Amplifier,” VLSI Design/CAD Symposium,2006.
15. Hong-Yi Huang, Ruei-Iun Pu, “Bidirectional
Transceiver for On-Chip Interconnections, ”VLSI Design/CAD Symposium,2006.
16. Hong-Yi Huang, Shin-Dian Jan, “All Digital Pulsewidth Control
Loop with Real Time Output,”VLSI Design/CAD Symposium,2006.
17. Hong-Yi Huang, Sheng-Fen Ho and
Li-Wei Huang, “A Wideband Programmable Spread-Spectrum Clock Generator,
”VLSI Design/CAD
Symposium, 2005.
18. Hong-Yi Huang, Chun-Ting Chen, “A 0.25um 86dB
CMOS Wireless Infrared Receiver,” VLSI Design/CAD Symposium, B3-6, 2004.
19. Hong-Yi Huang and Jian-Hong Shen, “A
66MHz-1GHz DLL-Based Programmable Clock Generator,” VLSI Design/CAD Symposium, P2-16,
2004.
20. Hong-Yi Huang, Ching-Chieh Wu and Shih-Lun
Chen, “simultaneous
Current-Mode Bidirectional Transceiver,” VLSI Design/CAD Symposium, P4-20,
2004.
21. Hong-Yi Huang, Chun-Jen
Huang and Bo-Ruei Wang, “A
Low-Voltage Rail-to-Rail Operational Amplifier Using Dual P-Channel Input
Pairs,’ VLSI Design/CAD Symposium, B4-1, 2004.
22.
Wei-Ming Lin and Hong-Yi Huang, “A Low-Jitter Pulse Width Control
Circuit,” VLSI Design/CAD Symposium, B1-4, 2003.
23.
Chin-Shan Shieh and Hong-Yi Huang, “A 250MHz Wireless Infrared
Receiver with Feedforward Offset Corrector”, VLSI Design/CAD Symposium, P1-5,
2003.
24.
Hong-Yi Huang and Tzu-Sung Yen, “A Loadless 4N SRAM with Smart Hidden Refresh,”
VLSI Design/CAD Symposium, P2-4, 2003.
25.
Hong-Yi Huang and Yang Chou, “CMOS Differential Circuits Using Charge-
Redistribution and Reduced-Swing Schemes,” VLSI Design/CAD
Symposium, C4-5, 2003.
26.
Shu-Feng Lee and Hong-Yi
Huang, “A Digitally Programmable Rail-to-Rail CMOS Operational Amplifier,”
VLSI Design/CAD Symposium, P4-4, 2003.
27.
Hong-Yi Huang and Shih-Lun Chen, “Deep-Submicron Interconnection Triggers and
accelerator,” VLSI Design/CAD Symposium, pp.129-132, 2002.
28.
Hong-Yi Huang and Jinn-Fu Lin, “Frequecy Synthesizer Using CMOS Bulk Input Technique”,
VLSI Design /CAD Symposium, pp.228-231 , 2002
29.
Fu-Kai Tsai and Hong-Yi Huang, “A Infra CMOS Readout Circuit with
Time Delay Integration,” VLSI Design /CAD Symposium, pp.26-29, 2002.
30.
Hong-Yi Huang and Teng-Neng Wang, “High-Speed Circuits in Capacitor Coupling and
Folding Techniques, ” VLSI Design /CAD Symposium, B1-7, 2001
31.
Hong-Yi Huang and Shih-Lun Chen, “Sense Amplifiers for High-Speed Interconnection
Design,” VLSI
Design /CAD Symposium, B1-8, 2001.
32.
Hong-Yi Huang and Xuan-Yi Su, “Low-Power 2P2N Pseudo SRAM with Column Hidden
Refresh,” VLSI
Design /CAD Symposium, C3-8, 2001.
33.
Hong-Yi Huang and Teng-Neng Wang, “CMOS Capacitor Coupling (C3) Logic Circuits,“
VLSI Design /CAD Symposium, pp/357-360, 2000.
34.
Hong-Yi Huang, Kuo-Hsing Chen, Jinn-Shyan Wang, and Chung-Yu Wu, “True-Single-Phase
Pipelined Systems with Locally Asynchronous Differential Logic Circuits”, VLSI
Design /CAD Symposium, 1995.
35.
Hong-Yi Huang and Chung-Yu Wu, “New CMOS Differential Logic Circuits for True-Single-Phase
Pipelined Systems,” VLSI Design /CAD Symposium, 1994.
36.
Hong-Yi Huang and Chung-Yu Wu, “A New-Two-Phase Pipelined Dynamic CMOS Ternary
Logic,” Electron Devices and Materials Meeting, 1989.
D. Lecture Notes
1.
Mixed-Signal IC Design and Layout
2.
Analog Integrated Circuits Design
3.
Low-Power VLSI Design
4.
High-Speed VLSI Design
5.
Memory Integrated Circuits Design
6.
Digital Integrated Circuits Design
7.
Microelectronic Circuits (II)
8.
Laboratory of Mixed-Signal Integrated Circuits
9.
Laboratory of Analog Integrated Circuits
10.
Laboratory of Digital Integrated Circuits
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